PBP 3.1.0

Pbp 3.1.0
We've classified PBP 3.1 as a major upgrade due to additional assembly-libraries necessary to support Microchip's changes in memory map on their latest devices. The new libraries allow us to continue adding support for the latest 8-bit microcontrollers as they are released.

Added support for devices: 10(L)F320, 10(L)F322, 16(L)F15313, 16(L)F15323, 16(L)F15324, 16(L)F15325, 16(L)F15344, 16(L)F15355, 16(L)F15356, 16(L)F15375, 16(L)F15376, 16(L)F15385, 16(L)F15386, 16(L)F1773, 16(L)F1776, 16(L)F1777, 16(L)F1778, 16(L)F1779, 16(L)F18324, 16(L)F18344, 16(L)F18854, 16(L)F18855, 16(L)F18856, 16(L)F18857, 16(L)F18875, 16(L)F18876, 16(L)F18877, 18(L)F24K40, 18(L)F25K40, 18(L)F26K40, 18(L)F27K40, 18(L)F45K40, 18(L)F46K40, 18(L)F47K40, 18(L)F65K40, 18(L)F66K40, 18(L)F67K40

Added Peripheral Pin Select (PPS) initialization for HPWM, HSERIN, HSEROUT, HSERIN2 and HSEROUT2 commands on devices equipped with modern-format PPS.
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Pbp 3.1.2

by Charles Leo
- Fixed bit-compare and bank-select for banks higher than 15 in K42/K83 families
- Fixed compile error when using arrays with 10F3xx
- Fixed HPWM for 16F18313/23, 16F1769
- Changed default #CONFIG for 16(L)F15xxx family to set SOSC pins to normal I/O
- Changed default #CONFIG for 16(L)F171x family to disable ZCD on power up
- Fixed HPWM CCPTMRSx-selection for 18(L)FxxK42
- Fixed PPS and HPWM for 16F161x family
- Fixed missing SFRs in 18LFxxK42 devices
- Channel: PBP Version History
02-25-2019, 12:51 PM
Pbp 3.1.1

by Charles Leo
- Added support for devices: PIC16(L)F19155, PIC16(L)F19156, PIC16(L)F19175, PIC16(L)F19176, PIC16(L)F19185, PIC16(L)F19186, PIC16(L)F19195, PIC16(L)F19196, PIC16(L)F19197, PIC18(L)F24K42, PIC18(L)F25K42, PIC18(L)F26K42, PIC18(L)F27K42, PIC18(L)F45K42, PIC18(L)F46K42, PIC18(L)F47K42, PIC18(L)F55K42, PIC18(L)F56K42, PIC18(L)F57K42, PIC18(L)F25K83, PIC18(L)F26K83
- Changed default PPS pins for HSER2 commands to avoid accidental ICSP lockout
- Added method to cancel CCP-PPS defaults in devices so
...
- Channel: PBP Version History
01-02-2018, 06:08 AM
Pbp 3.1.0

by Charles Leo
We've classified PBP 3.1 as a major upgrade due to additional assembly-libraries necessary to support Microchip's changes in memory map on their latest devices. The new libraries allow us to continue adding support for the latest 8-bit microcontrollers as they are released.
- Added support for devices: 10(L)F320, 10(L)F322, 16(L)F15313, 16(L)F15323, 16(L)F15324, 16(L)F15325, 16(L)F15344, 16(L)F15355, 16(L)F15356, 16(L)F15375, 16(L)F15376, 16(L)F15385, 16(L)F15386, 16(L)F1773, 16(L)F1776,
...
- Channel: PBP Version History
04-26-2017, 09:27 AM
Pbp 3.0.10

by Charles Leo
PBP 3.0.10 and later requires Windows 7/8/10. Windows XP is no longer supported.
- Fixed bank-boundary vulnerability for LONG array variables
- Fixed SPBRG register names on 16F1824 family
- Fixed READ/WRITE issues for 16(L)F183xx
- Changed default config for 18F87K22 for better results
- Added DAC1CON0/DAC1CON1 SFRs for 12F1571/72
- Added support for 16(L)F18326, 16(L)F18346
- Channel: PBP Version History
02-25-2017, 05:52 AM
Pbp 3.0.9

by Charles Leo
- Fixed READ/WRITE errors (missing EEADR>NVADR) for 16F176x
- Fixed RESUME bad-BSR vulnerability in enhanced mid-range families
- Channel: PBP Version History
02-25-2017, 05:47 AM
Pbp 3.0.8

by Charles Leo
- Added support for devices: 16(L)F1454, 16(L)F1458, 16(L)F1459, 12(L)F1571, 16(L)F1572,
  16(L)F1574, 16(L)F1575,16(L)F1578, 16(L)F1579, 12(L)F1612, 16(L)F1613, 16(L)F1614, 16(L)F1615, 16(L)F1618, 16(L)F1619, 16(L)F1703, 16(L)F1704, 16(L)F1705, 16(L)F1707, 16(L)F1708, 16(L)F1709, 16(L)F1713, 16(L)F1716, 16(L)F1717, 16(L)F1718, 16(L)F1719, 16(L)F1764, 16(L)F1765, 16(L)F1768, 16(L)F1769, 16LF1554, 16LF1559, 16(L)F18313*, 16(L)F18323*, 16(L)F18325*, 16(L)F18345*, 16F753, 16HV753, 18F97J94, 18F8
...
- Channel: PBP Version History
06-03-2015, 05:52 AM

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Pbp 3.1.0

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