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  • #16
    I don't have any chips to test with but I just stumbled across a post on the EEVBlog forum talking about a silicon bug causing TBLRD to not return the correct data on the K40 series chips. The chip errata does mention it and there's also a suggested workaround. I suspect the PBP compiler uses TBLRD for all sorts of stuff(?) so if it's not allready taken care of in the new libraries it might be worth looking into.

    /Henrik.

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    • #17
      I'm not inclined to implement the TBLRD workaround until testing proves that the currently-available chips exhibit the problem. The easiest commands to test are LOOKUP and LOOKUP2. If the commands misbehave and a preemptive setting of "NVMCON1.7 = 1" fixes the problem, let me know. Aside from the LOOKUP/LOOKDOWN commands, at first glance it looks like PBP uses TBLRD for SEROUT, DTMFOUT, and the trig operators SIN, COS and ATN. I only did a quick text search, so there may be more.

      The errata shows that silicon rev A2 is the only one affected. In the past, when a second revision is released so soon, the number of first-revision chips has been relatively few. We don't usually implement workarounds in PBP when the bug has been fixed in current silicon.

      If you find that newly-purchased chips need the setting, I can initialize NVMCON1 on program start and after READ/WRITE commands are executed.

      Thanks for flagging this, Henrik.
      Charles Leo
      ME Labs, Inc.
      http://melabs.com

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      • #18
        I got some PIC18F27K40 yesterday. I'll test them this week-end.

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        • #19
          FYI DT_INTS-18 doesn't work:

          Code:
          Symbol not previously defined (INTCON3)
          These new chips don't have INTCON2 & INTCON3 registers. Just a few defines to rework.

          To be continued...

          Comment


          • #20
            Good to know. I will probably create an Include just for the K40s. Mine came in yesterday. Started playing today. Got an LED to blink, then decided to get the PICkit 3 hooked up for breadboard mounted programming (I normally use the MELabs U2). It didn't list the K40, so went to Microchip's site to download the latest version of software for the PICkit 3 and inadvertently fudged up my U2 software!

            I want to play with the new ADC2 and verify PWM functions for Charles. Already have a project in the works to take advantage of the new cool stuff.
            We can crack this cotton PIC'n thang!

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            • #21
              After 2+ hours of fighting getting the MELabs U2 Programmer working again (won't go into that fiasco), was able to get basic ADCIN working blinking an LED. Next I got basic HPWM working on the default CCP1 PORTC.2. Amazingly, by just calling CCP1 PORTC.3 in the DEFINE, it worked. I didn't even have to use the CCP1PPS SFR! Great work Charles!!! Now to play with more of the ADC2 features.
              We can crack this cotton PIC'n thang!

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              • #22
                Stayed up all night working on the DT_INT-18 for K40. I reconfigured all the interrupt identifiers to match the SFRs & naming convention listed in the Data Sheet. This is for the 28 & 40 pin versions. I looked over the 64 pin versions and the registers are completely different. Let me know how it works for you.
                Attached Files
                We can crack this cotton PIC'n thang!

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                • #23
                  As a side note, anything the 28 & 40 pin K40's don't have I removed; like USB, Parallel Port, Timer 7, CAN, and so forth. It can be grafted into the older DT_INT-18 with #INDEF qualifiers later. Just wanted to get it working on the new cool stuff for now.
                  We can crack this cotton PIC'n thang!

                  Comment


                  • #24
                    I still have not received my K40.

                    As for the notifications, I am again not lucky...

                    Ioannis

                    Comment


                    • #25
                      Rev A2 bug

                      @Charles: Looks like my PIC18F27K40 seems to be rev "A2"

                      Click image for larger version

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                      LOOKUP/LOOKDOWN commands does misbehave but NVMCON1.7 = 1 fixes the problem.

                      Test code:
                      Code:
                      hserout2 [13,10,13,10, "PIC18F27K40 test board", 13,10]
                      
                      hserout2 ["Test Lookup: ["]
                      for PtrB = 0 to 10
                          Lookup PtrB, ["Hello world"], TempB 
                          hserout2 [TempB]           
                      next PtrB
                      hserout2 ["]", 13,10,13,10]
                      
                      hserout2 ["Test Lookup2: ["]
                      for PtrB = 0 to 2
                          Lookup2 PtrB, [256,512,1024], TempW 
                          hserout2 [dec TempW, " "]           
                      next PtrB
                      hserout2 ["]", 13,10,13,10]
                      
                      hserout2 ["Test LOOKDOWN: ["]
                      for PtrB = 65 to 69
                          TempB = 255
                          LOOKDOWN PtrB, ["ABCDEF"], TempB 
                          hserout2 [dec TempB, " "]           
                      next PtrB
                      hserout2 ["]", 13,10,13,10]
                      
                      hserout2 ["Test LOOKDOWN2: ["]
                      for PtrB = 65 to 69
                          TempB = 255
                          LOOKDOWN2 PtrB, ["FEDCBA"], TempB 
                          hserout2 [dec TempB, " "]           
                      next PtrB
                      hserout2 ["]", 13,10,13,10]
                      
                      hserout2 ["Test LOOKDOWN2 >: ["]
                      for PtrB = 65 to 69
                          TempB = 255
                          LOOKDOWN2 PtrB, >["FEDCBA"], TempB 
                          hserout2 [dec TempB, " "]           
                      next PtrB
                      hserout2 ["]", 13,10,13,10]
                      Results with NVMCON1.7 = 1:
                      Code:
                      PIC18F27K40 test board
                      Test Lookup: [Hello world]
                      
                      Test Lookup2: [256 512 1024 ]
                      
                      Test LOOKDOWN: [0 1 2 3 4 ]
                      
                      Test LOOKDOWN2: [5 4 3 2 1 ]
                      
                      Test LOOKDOWN2 >: [255 5 4 3 2 ]
                      Results without NVMCON1.7 = 1:
                      Code:
                      PIC18F27K40 test board
                      Test Lookup: [5 255 255 ]
                      
                      Test LOOKDOWN2 >: [0 0 0 0 0 ]

                      @mpgmike: thanks for DT_INT-18 for K40!

                      Comment


                      • #26
                        Ok, I'll fix it some more and publish a new beta. I have jury duty today, so it will be toward the end of the week.

                        Ioannis - I'm not sure why the forum isn't always sending you mail. It seems to only send a notice after you post - then it forgets about you until you post again. You could try changing your profile settings for the way you are notified.
                        Charles Leo
                        ME Labs, Inc.
                        http://melabs.com

                        Comment


                        • #27
                          In a 4-5 days I will have my K40 to report on the beta.

                          As for the notifications, now I received again.

                          Strange, I have not changed anything in the profile and last time I checked, seemed OK.

                          Ioannis

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                          • #28
                            Charles, on the 2xK40 & 4xK40 the default output pin for RX2 is RB7 and TX2 is RB6.


                            Originally posted by Charles Leo View Post
                            ...

                            In the meantime, the notes for the K40 changes in PBP, as it stands currently, are below:

                            Code:
                            --------------------------------------------------------------------------------
                            HSEROUT/HSEROUT2
                            
                            Default output pins if no DEFINE is used:
                            
                                           2xK40   4xK40   6xK40
                            RX1            RC7     RC7     RC7
                            TX1            RC6*    RC6     RC6
                            RX2            RB6     RB6     RG2
                            TX2            RB7     RB7     RG1
                            
                            ...

                            Comment


                            • #29
                              I've posted a new beta with the NVMCON1 workaround:
                              http://pbp3.com/downloads/PBP3_310_BETA_Setup.exe

                              This installation only allows compilation for the new chips that need testing, so you shouldn't replace your existing PBP installation. Rather, install to a separate folder.

                              We're still chasing a pesky versioning bug in the new exe file, so this one will still identify as 3.0.9. You'll know it's the beta because the list of available devices will be short.

                              This also has fixes for READ/WRITE commands in the 16F183xx series.
                              Charles Leo
                              ME Labs, Inc.
                              http://melabs.com

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                              • #30
                                Thanks Charles.

                                Does this limitation (compiling new chips only) apply to the previous beta too?

                                Ioannis

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