Announcement

Collapse
No announcement yet.

ADCIN on 18F67K40

Collapse
X
 
  • Filter
  • Time
  • Show
Clear All
new posts

  • ADCIN on 18F67K40

    The ADC Channels on this device are not numbered sequentially (i.e. AN0 to ANx) - the are banked into port prefixes ANA0 to ANA7, ANB0 to ANB7 etc.

    With devices that use sequentially numbered inputs an alias can be created to AN1 by "Input1 CON 1". How is this done with the analog channel numbering scheme used in the 18F67K40?

    Regards,

    Andy

  • #2
    In older chips you would choose your analog port with ADCON0. With the PIC18F67K40 it is with ADPCH. If you want a simple ADCIN, ADCON0 is set to default to legacy mode. If you want some of the cool features of the ADC2, there are quite a few SFRs to get you there.

    As for the aliasing,
    Input1 var ANA0
    Input2 var ANC4

    etc.
    We can crack this cotton PIC'n thang!

    Comment


    • #3
      Hi mpgmike,

      Thanks for the reply. Reading back what I initially wrote I don't think I explained the issue correctly.

      ADCIN only appears to accept numeric (not alphanumeric) input for the channel number - "ADCIN 0, Temp" compiles fine whereas "ADCIN ANA0, Temp" produces a syntax error. Therefore any alias to ANA0 used with ADCIN will produce the same error.

      Not sure what you mean by ADC2? Is this a new command?

      Andy

      Comment


      • #4
        To set up a numeric constant for the ANxx channels, you would still use the CON operator. On the 67K40, the channel-number parameter in ADCIN is written to the ADPCH register to select the channel. The sequential channel numbers still exist, but you MUST refer to ADPCH in the datasheet to find the corresponding ANxx designation. Doing so, you will find the following assignments:

        Code:
        ANG7 CON  %110111
        ANG6 CON  %110110
        ANG4 CON  %110100
        ANG3 CON  %110011
        ANG2 CON  %110010
        ANG1 CON  %110001
        ANG0 CON  %110000
        ANF7 CON  %101111
        ANF6 CON  %101110
        ANF5 CON  %101101
        ANF4 CON  %101100
        ANF3 CON  %101011
        ANF2 CON  %101010
        ANF1 CON  %101001
        ANF0 CON  %101000
        ANE7 CON  %100111
        ANE6 CON  %100110
        ANE5 CON  %100101
        ANE4 CON  %100100
        ANE3 CON  %100011
        ANE2 CON  %100010
        ANE1 CON  %100001
        ANE0 CON  %100000
        AND7 CON  %011111
        AND6 CON  %011110
        AND5 CON  %011101
        AND4 CON  %011100
        AND3 CON  %011011
        AND2 CON  %011010
        AND1 CON  %011001
        AND0 CON  %011000
        ANB7 CON  %001111
        ANB6 CON  %001110
        ANB5 CON  %001101
        ANB4 CON  %001100
        ANB3 CON  %001011
        ANB2 CON  %001010
        ANB1 CON  %001001
        ANB0 CON  %001000
        ANA7 CON  %000111
        ANA6 CON  %000110
        ANA5 CON  %000101
        ANA4 CON  %000100
        ANA3 CON  %000011
        ANA2 CON  %000010
        ANA1 CON  %000001
        ANA0 CON  %000000
        With these constants defined, you can now write "ADCIN ANA0, result".

        Be aware that I am only reading the datasheet. I have not tested this and my limited experience with the K40 devices predicts that this is probably just the tip of the iceberg.

        Charles Leo
        ME Labs, Inc.
        http://melabs.com

        Comment


        • #5
          Hi Charles,

          Thanks for the input. It is all working ok.

          Regards,

          Andy

          Comment


          • #6
            also be aware of the errata for this new chip series , on the adc - add tad time fix , also of concern , check is the section core18 errata for the
            TBLRD requires NVMREG value to point to appropriate memory fix for the silicon rev





            Comment


            • #7
              http://www.microchip.com/wwwproducts/en/PIC18F67K40

              Comment

              Working...
              X