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setting an OSC value of 1Mhz in PBP 3

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  • setting an OSC value of 1Mhz in PBP 3

    HI CHARLES ,

    need to use 18f at 1mhz but get an error(101) invalid OSC define , is there way to solve this

  • #2
    There are no 1MHz libraries in PBP. You can use OSC 4 and then all the timing in PBP will be scaled by a factor of 4. For example, a PAUSE 1 will give you a 4mS pause.
    Charles Leo
    ME Labs, Inc.
    http://melabs.com

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    • #3
      ok , but is this a bit of limitation for this command , i am sure you been asked this many a time to review , more so where the osc is not an exact match for the define as it stands

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      • #4
        again on further review , changing the osc to 4mhz is very sloppy poor answer to the problem

        it means that any code transported between chips will have the pause, pauseus incorrectly set , plus any other timing related commands

        it makes for alot harder work to support the code down the road

        not a good way to go in any way of looking at it

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        • #5
          I can't justify ripping up the libraries at this point. The obstacles haven't changed since the decision was made 18 years ago.

          Perhaps I can help on the other side of the problem. Why are you required to run the system clock at 1MHz?
          Charles Leo
          ME Labs, Inc.
          http://melabs.com

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          • #6
            when the cpu runs at 4mhz running it draws 1.65ma , at 1mhz it draws 0.94ma in the same app

            although not a lot it adds up on battery and i have been trimming the code for power save options of the cpu

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            • #7
              Have you looked at going to low-power sleep part of the time or switching the clock frequency as needed? It's common to run at a very slow clock until something triggers the need for a time-critical part of the code.

              If it's mostly pause commands that are the problem, you could roll your own routines using timer peripherals. Accuracy will always be a compromise with clock speed, but you might be able to run at 32KHz during your waits and save even more power. You can also use a NAP command timed with the watchdog timer.

              For the issue of porting code in the future, you could use conditional compile directives to substitute code sections based on a clock constant. It's clunky, but that's what it's there for.

              In any case, there isn't much hope of calibrating PBP to 1MHz. PBP timing is mostly based on the PAUSEUS routine. It's impossible to maintain 1uS accuracy when the instruction cycle is 4uS. The original developers added a 3.58MHz selection because this was a popular frequency back then, but the PAUSEUS command isn't happy with it. There's just too much PBP code that requires a 1uS time slice.
              Charles Leo
              ME Labs, Inc.
              http://melabs.com

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              • #8
                yes 4us is a long time , and it makes sense to use the 1us as min time base
                i do follow that thinking - thanks charles

                yes i am using the sleep command , although having some issues with the ISR returning to the main body of code atm , ( have look on the other forum)

                i have not tried to go to lower clock as yet , as sleep is the best option to save on power but if i cant get it to return to main body of code then may be next option


                cheers

                sheldon

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                • #9
                  What chip are you using? What else is hooked to it?

                  Depending on the chip, if you're using sleep and still using 1mA I don't think your really in sleep. 12F683s are in the nA when asleep though I'm not sure of bigger chip current requirements.

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                  • #10
                    Hey Sheldon, Why not unplug the processor all together and measure the connected circuit current draw without the processor? I have a feeling thats most of it....
                    Dave Purola,
                    N8NTA
                    EN82fn

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